TOKYO — Toshiba Corp. has developed a one-transistor, no-capacitor cell structure that it claims solves the difficulties encountered in producing DRAMs in sub-0.1-micron process technology. The ...

To push access times toward those of SRAM while achieving much higher densities, embedded DRAM needs a structure that differs from both commodity DRAM and conventional embedded DRAM. The challenge is ...

This week, at the 2020 International Electron Devices Meeting, imec, a world-leading research and innovation hub in nanoelectronics and digital technologies, presents a novel dynamic random-access ...

Leakage current has been a leading cause of device failure in DRAM design, starting with the 20nm technology node. Problems with leakage current in DRAM design can lead to reliability issues, even ...

On June 4, 1968, Robert Dennard was granted a patent for a single transistor, single capacitor DRAM cell design idea. This doesn’t sound earth-shattering today, but back in the sixties, this was a ...

Dynamic random access memory (DRAM) stores data in a capacitor. These capacitors leak charge so the information fades unless the charge is refreshed periodically. Because of this refresh requirement, ...