Designers of electronics and communications systems are constantly faced with the challenge of integrating greater functionality on less silicon area. Many of the system blocks – such as power ...

When a CMOS circuit is in an idle state there is still some static power dissipation–a result of leakage current through nominally off transistors. Both nMOS and pMOS transistors used in CMOS logic ...

For years—decades, in fact—the NMOS transistor world has been on cruise control. NMOS is naturally faster and its performance has scaled better than PMOS. PMOS has had a cost advantage. But lately, it ...

PMOS transistors are less vulnerable to substrate noise since they’re placed in separate wells; designers implement guard rings to attenuate the substrate noise propagation. However, substrate noise ...

Even as industry moves into the era of the high k metal gate (HKMG) and FinFET transistor, chipmakers continue to seek ways to improve device performance. One of the latest advances and the subject of ...

Advanced process technologies, such as 90nm, 65nm, 45nm and below, present significant power management challenges for high performance semiconductors. Chip designers face increasing challenges in ...

Intel is in production with several 65-nm processors now, creating an inventory of commercial microprocessor products that will begin shipping early next year. At the IEDM conference, Intel showed die ...

Intel has unveiled technical breakthroughs that maintain a pipeline for the company’s future process roadmap, underscoring the continuation and evolution of Moore’s Law. At the 2023 IEEE International ...

Motorola today announced a transistor technology aimed at propping up Moore's Law for a while longer, announcing the creation of a transistor gate structure that allows for the equivalent of two ...