What does "PHY" refer to? - Electrical Engineering Stack Exchange
Oct 20, 2021 · a PHY is a type of Ethernet physical layer (eg. 100BASE-TX, 10BASE-T) a PHY is an Ethernet transceiver IC (eg. an IC that converts 100BASE-TX to MII/RMII) a PHY is a physical layer …
what is the difference between PHY and MAC chip
Jul 11, 2013 · what is the difference between PHY and MAC chip Ask Question Asked 12 years, 6 months ago Modified 12 years, 6 months ago
microcontroller - Why are Ethernet MAC and PHY separate? - Electrical ...
Dec 16, 2022 · The PHY also dissipates a significant amount of power all by itself. And sometimes different media require different PHYs, but the MAC can be the same. For all of these reasons, it …
Ethernet switch IC ports in MAC and PHY mode
Nov 8, 2021 · 1/ for port 2 and 6, the phy is external. Unfortunately though not all phy information is present on an RGMII/GMII and this is sent over MDIO/MDC. The switch needs to know you have a …
The SERDES/transceiver design inside the Ethernet MAC controller
Nov 15, 2019 · The 1st and 2nd figures are normal application which transmits the data through copper media with coded information (through PCS/PMD/PMA inside the PHY chip). The interface between …
MIPI D-PHY Image sensor with SoC - Electrical Engineering Stack …
Mar 8, 2025 · Meticom's FPGA to D-PHY bridge ICs allow to connect MIPI® D-PHY compliant peripherals like camera sensors with D-PHY output and displays with D-PHY inputs to be connected …
What is the maximum recommended routing distance between MAC …
Feb 26, 2021 · I wish to avoid ETH PHY and magnetics, as the interface is between two processors only. I have a few RGMII outputs coming from a TI-TDA2x, which needs to be taken to a back-plane. …
Why do Ethernet PHY magnetics have a center tap?
May 23, 2023 · I've a question with the Ethernet PHY connection to the RJ45 connector. With either discrete or integrated magnetics, either with voltage mode PHY or current mode PHY, what is the …
Understanding 100Base-T1 PHY: 4B3B encoding and timing
Jul 29, 2025 · The PHY receive data path must recover the clock of the transmitter and use the elastic buffer to allow transferring received data to CPU with local clocks. Unless the CPU supports MII and …
Connecting a PHY to another PHY on a same board
Aug 14, 2022 · Generally, if I'm connecting a PHY to RJ45 connector, I would add center tap capacitors and Bob-Smith termination like below. But if I am connecting a PHY to another PHY, do I still need …